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XCATM
Full Duplex ATM Cell Processing up to 10 Gbit/s

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General Description

The Xelic ATM Processor is a full duplex standards based core designed for integration with customer proprietary intellectual property.

On the transmit side, the XCATM will generate and optionally insert HEC byte information with coset addition (optional). Additionally, the transmitter will accumulate incoming cell and inserted idle cell counts, generate HEC error/valid signals, and perform cell rate adaptation through the insertion of programmable idle cells. Idle cells inserted contain programmable GFC, PTI, CLP, and payload value fields. A programmable test feature provides for the corruption of the HEC header byte information.

The XCATM receiver will perform cell delineation and generate Out of Cell Delineation (OCD) and Loss of Cell Delineation (LCD) error conditions. Interpreters are implemented to detect idle cell, corrupted cell, and valid cell conditions. Single header bit errors are optionally corrected and multiple error headers are detected and dropped. Counters are available for accumulation of idle cells, received valid cells, HEC error cells, dropped cells, and corrected cells.

Features

  • Designed for ASIC and/or FPGA implementations
  • Complies with ITU-T G.432.1 and ITU-T G.432.2 standards
  • Programmable counters for user defined interval or errored second accumulation
  • Implements ATM cell self-synchronous scrambling/descrambling (1+x43) with disable capability
  • Calculates and optionally inserts HEC byte information
  • Optional HEC coset addition capability
  • Programmable HEC insert corruption capability
  • Detects and accumulates transmitted idle and valid cells
  • Performs cell rate adaptation through the insertion of idle cells with programmable GFC, PTI, CLP, and payload fields
  • Performs cell delineation with OCD and LCD detection
  • Programmable OCD and LCD state machine operation
  • Provides cell detection mode and optional correction mode capability
  • Detects and accumulates received idle cells, valid cells, HEC error cells, dropped cells, and corrected cells

Please contact cores@xelic.com for additional information.

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